Software Defined Radio is a technology that substitutes bulkier analog radio, adding more flexibility, tunable performance and a smaller form factor.

Scientech 2281 V2.0 is a high performance Software Defined Radio (SDR) platform which enables engineers to rapidly design and implement powerful, flexible software radio systems.

Scientech 2281 V2.0 is build around high speed FPGA to provide high performance signal processing which will help engineers from wireless industry, research & academic to prototype and test their wireless communication applications.


  • Portable design.
  • Designed around wireless industry, research & academic need.
  • Block level approach.
  • Supported communication links: - wired, wireless & fiber optics (optional).
  • Incorporates encoding, modulation, wireless channel, impairments, synchronization, demodulation, decoding, etc.
  • Internal test data mode with BER.
  • RF-up converter from 400MHz to 4GHz.
  • RF-down converter from 40MHz to 3GHz.
  • Fully programmable.
  • Control & acquisition for real-time signal time domain analysis on software.
  • Low-noise frequency synthesizer.
  • JTAG for FPGA configuration.
  • Interface: Ethernet and USB2.0.


  • It allows engineers to prototype and test wireless communication applications.
  • It comes along with standard built-in modules which will help engineers to kick start their wireless communication journey.
  • It allows rapid prototyping of high performance wireless communication system.

System Architecture

Things you can do

  • Install and understand the complete Software Defined Radio setup.
  • Perform and understand unmodulated carrier in frequency domain using Spectrum Analyzer.
  • Establish, analyze and verify end to end wireless communication link between Transmitter and Receiver using test data and BPSK, QPSK and OQPSK modulation.
  • Understanding the effect of AWGN noise over end to end wireless communication link.
  • Understanding BER measurement.
  • Doppler effect in wireless communication.
  • Establish wireless MSK & GMSK Modulation & Demodulation complete study, measurement & analysis in time & frequency domain.

Technical Specifications

SDR Transmitter

  • Maximum Symbol Rate: up to 40 Mbps.
  • Device Xilinx Artix7 FPGA (XC7A100T-1) for massive parallel computing.
  • Dual 500 MSPS 16-bit D/A converters for I Channel and Q Channel.
  • 6-pole Butterworth clock rejection filters.
  • Wideband modulation bandwidth > 200MHz.
  • DAC clock rejection @ 40 MHz > 84 dBc.
  • Output voltage: 1Vpp with 0.85V DC bias.
  • JTAG USB connector for FPGA configuration.
  • Standard built-in modulations like BPSK, QPSK, & OQPSK.
  • Standard built-in Forward Error Correction is Turbo Code.
  • Digital Filters: Raised Root Cosine with variable roll-off with interpolation and decimation facility.
  • Built-in real time Software for Transmitter signal analysis.
  • Built-in Data Generator as test pattern.
  • 400MHz to 4GHz Quadrature Modulator.
  • Fixed 10 MHz Local Oscillator (±2.5PPM).
  • Ethernet port for data, control and monitor.
  • USB2.0 port control and monitor.
  • SMA connector.

SDR Receiver

  • Maximum Symbol Rate: up to 40 Mbps.
  • Device Xilinx Artix7 FPGA (XC7A100T-1) for massive parallel computing.
  • JTAG USB connector for FPGA configuration.
  • 40MHz - 3GHz Quadrature De-modulator.
  • 14 bit ADC with 100 MHz internal sampling clock.
  • Low-noise frequency synthesizer can be tuned over entire range by steps of 100, 31.25 or 25 KHz
  • Built in RF AGC.
  • Built-in channel impairments generation: AWGN and frequency offset (Doppler)
  • Ethernet port for data, control and monitor.
  • USB2.0 port control and monitor
  • SMA connector

List of Accessories

SDR Transmitter
1 no.
SDR Receiver
1 no.
Patch Panel Antenna (800-960 & 1710-2500 MHZ)
2 nos.
Ethernet cable
2 nos.
USB cable
2 nos.
N-Type BNC (male) to BNC (Female) convertor
2 nos.
BNC (Male) to SMA (Female) convertor
2 nos.
SMA (Male) to SMA (Male) cable
2 nos.
For more information please feel free to contact us.

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